1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display (LCD) device and a method of fabricating the same.
2. Discussion of the Related Art
Until recently, display devices have typically used cathode-ray tubes (CRTs). Presently, many efforts and studies are being made to develop various types of flat panel displays, such as liquid crystal display (LCD) devices, plasma display panels (PDPs), field emission displays, and electro-luminescence displays (ELDs), as a substitute for CRTs. Of these flat panel displays, LCD devices have many advantages, such as high resolution, light weight, thin profile, compact size, and low voltage power supply requirements.
In general, an LCD device includes two substrates that are spaced apart and face each other with a liquid crystal material interposed between the two substrates. The two substrates include electrodes that face each other such that a voltage applied between the electrodes induces an electric field across the liquid crystal material. Alignment of the liquid crystal molecules in the liquid crystal material changes in accordance with the intensity of the induced electric field into the direction of the induced electric field, thereby changing the light transmissivity of the LCD device. Thus, the LCD device displays images by varying the intensity of the induced electric field.
FIG. 1 is a perspective view illustrating an LCD device according to the related art.
Referring to FIG. 1, the LCD device 11 includes an array substrate B2, a color filter substrate B1 and a liquid crystal layer 14 between the two substrates B1 and B2.
The array substrate B2 includes gate and data lines 12 and 24 crossing each other to define a pixel region P on a first substrate 22. A thin film transistor T is located at a crossing of the gate and data lines 12 and 24. The thin film transistor T includes a gate electrode 30, a semiconductor layer 32 and source and drain electrodes 34 and 36. A pixel electrode 17 is disposed in the pixel region P and connected to the drain electrode 36.
The color filter substrate B1 includes red (R), green (G) and blue (B) color filter patterns 7a, 7b and 7c in respective pixel regions P and a black matrix 6 between the color filter patterns 7a, 7b and 7c, on a second substrate 5. A common electrode 18 is disposed on the color filter patterns 7a, 7b and 7c. 
Liquid crystal molecules of the liquid crystal layer 14 are initially oriented by alignment layers (not shown). When voltages are applied to the pixel and common electrodes 17 and 18, a vertical electric field is induced. The liquid crystal molecules are arranged by the induced electric field, and the light transmissivity of the LCD device 11 is changed, thus images are displayed.
The LCD device operated by the vertically induced electric field has a disadvantage in failing to achieve a wide viewing angle. To achieve a wide viewing angle, an IPS-LCD (in-plane switching mode LCD) device is suggested. The IPS-LCD device is operated by an in-plane electric field.
FIG. 2 is a plan view illustrating an IPS-LCD device according to the related art.
Referring to FIG. 2, in an array substrate of the related art IPS-LCD device, a gate line 52 and first and second common lines 56a and 56b extend along a first direction on a substrate 50. A data line 72 extends along a second direction crossing the first direction. The gate line 52 and the data line 72 define a pixel region P.
A thin film transistor T is located at a crossing of the gate and data lines 52 and 72. The thin film transistor T includes a gate electrode 54, a semiconductor layer 60 and source and drain electrodes 62 and 64.
A first common electrode 58 is disposed at sides of the pixel region P and connects the first and second common lines 56a and 56b. A second common electrode 82 is connected to the second common line 56b. A pixel electrode 80 is connected to the drain electrode 64 through a connection portion 78. The second common electrode 82 and the pixel electrode 80 are alternately disposed in the pixel region P to induce an in-plane electric field.
The connection portion 78 and the first common line 56a substantially overlap each other to form a storage capacitor Cst.
A color filter substrate (not shown) faces the array substrate. The color filter substrate has a gap spacer 98a and a press-buffer spacer 98b. The gap spacer 98a functions to maintain a cell gap between the array substrate and the color filter substrate. The press-buffer spacer 98b functions to relieve a force applied to a liquid crystal panel from outside, for example, a contact to the liquid crystal panel by a user's finger.
When an outside force is applied to the liquid crystal panel, the liquid crystal panel is bent. Liquid crystal molecules at the bent portion become abnormally arranged as compared to those at a normal portion. This causes retardation of light passing through the bent portion to substantially differ from the retardation of light passing through the normal portion. Accordingly, light leakage occurs, and thus display quality defects such as stains is caused. The press-buffer spacer 98b is used to prevent the above problem.
The gap spacer 98a contacts both the array substrate and the color filter substrate to maintain the cell gap, and the press-buffer spacer 98b is spaced apart from the array substrate.
FIGS. 3 and 4 are cross-sectional views taken along lines III-III and IV-IV of FIG. 2, respectively.
Referring to FIGS. 3 and 4, the related art IPS-LCD device 10 includes an array substrate, a color filter substrate and a liquid crystal layer between the two substrates.
A gate line 52 and a first common line 56a are on a first substrate 50. A gate insulating layer GI is on the gate line 52 and the first common line 56a. A semiconductor layer 60 is on the gate insulating layer GI, and source and drain electrodes 62 and 64 are on the semiconductor layer 60. The semiconductor layer 60 includes an active layer 60a and an ohmic contact layer 60b. A height adjuster 86 is disposed on the gate insulating layer GI and corresponds to the gate line 52. The height adjuster 86 includes a semiconductor pattern 86a and a metal pattern 86b. A passivation layer is disposed on the source and drain electrodes 62 and 64 and the height adjuster 86. A thin film transistor T includes a gate electrode 54, the semiconductor layer 60 and the source and drain electrodes 62 and 64. The gate line 52 and a data line (72 of FIG. 2) define a pixel region P.
A black matrix 92 is disposed on a second substrate 90. Red (R), green (G) and blue (B) color filter patterns 94a, 94b and 94c are disposed in the respective pixel regions P. A planarization layer 96 is disposed on the color filter patterns 94a, 94b and 94c. 
A gap spacer 98a and a press-buffer spacer 98b are disposed on the planarization layer 96.
The gap spacer 98a is disposed corresponding to the gate line 52, and the press-buffer spacer 98b is disposed corresponding to the first common line 56a. A height of the array substrate corresponding to the gap spacer 98a is substantially higher than a height of the array substrate corresponding to the press-buffer spacer 98b. Because of the height difference, the gap spacer 98a contacts the array substrate, and the press-buffer spacer 98b is spaced apart from the array substrate.
For the height difference, the height adjuster 86 is disposed at the array substrate corresponding to the gap spacer 98a. 
The gate line 52 and the first common line 56a have a thickness of about 2000 Å to about 2500 Å, the gate insulating layer GI has a thickness of about 4000 Å, the semiconductor layer 60 has a thickness of about 2000 Å, and the source and drain electrodes have a thickness of about 3000 Å. The height difference between the array substrate corresponding to the gap spacer 98a and the array substrate corresponding to the press-buffer spacer 98b is about 5500 Å. This height difference is considerable. However, when the array substrate is fabricated by five mask processes, because the metal pattern 86b covers the semiconductor pattern 86a, the height difference is reduced to some extent. Accordingly, the defect resulting from contact with the liquid crystal panel can be reduced.
However, as explained above, the related art IPS-LCD needs five mask processes, thus increasing both cost and fabrication time.